Objective of HiPer-PENTA

The objective of the HiPer project is to develop the concept of an automotive grade High Performance Vehicle Computer (HVPC) system that is capable to handle an autonomous driving environment. It will enable Level 5 automation and allow for the application of new electrical architectures by providing sufficient compute power and the necessary communication interfaces.

The consortium will substantiate this by demonstrating the HPVC system in a passenger car. The project aims at innovations along 3 paths: (i) Computation for thermal management, (ii) Communication for high speed communication and (iii) Integration for robust and more reliable systems.


PhD Position

For time-critical applications it is of paramount importance that throughput and latency requirements are met. For performance reasons, we shall in addition aim at effective and efficient resource usage, including energy, to prevent abundant heat production, amongst others. The high performance on-board vehicle computers (including the networks) shall therefore be designed with so-called tight analyzability in mind and complemented with tight analysis techniques. Unfortunately, as shown in [2], classical analysis techniques for Ethernet networks are overly pessimistic, resulting in over-dimensioning of systems. In this project, we aim at:

  (1) providing recommendations on the design and implementation of Automotive Ethernet networks enabling tight analyzability and

  (2) extending our earlier work on Ethernet AVB [1, 2, 3] towards Automotive Ethernet networks.

1. J. Cao, P.J.L. Cuijpers, R.J.Bril, and J.J. Lukkien, Independent yet Tight WCRT Analysis for Individual Priority Classes in Ethernet AVB, in: Proc. 24th International Conference on Real-Time Networks and Systems (RTNS), ACM, October 2016.
2. J. Cao, P.J.L. Cuijpers, R.J.Bril, and J.J. Lukkien, Tight worst-case response time analysis for Ethernet AVB using eligible intervals, In: Proc. 12th IEEE World Conference on Factor Communication Systems (WFCS), May 2016.
3. J. Cao, M. Ashjaei, P.J.L. Cuijpers, R.J. Bril and J.J. Lukkien, An independent yet efficient analysis ofbandwidth reservation for credit-based shaping, In: Proc. 14th IEEE International Workshop on Communication Systems (WFCS), June 2018.

Section SENS

The section Security and Embedded Networked Systems (SENS) comprises the chairs Security (SEC) and System Architecture and Networking (SAN). SAN performs research in the area of resource management in real-time and distributed systems considering the architecture and design of these systems as well as algorithms for management of shared resources. The SEC group focuses on technical aspects of security and privacy for embedded systems, in particular on trust management. The section has a tradition of working with industrial partners in various projects.

MSc in Computer Science or Embedded Systems;

Knowledge of (i) system and software architecture and (ii) real-time systems;

An interest in component based systems;

Ability to combine different research techniques and apply them to large scale industrial systems;

Good communicative skills in English, both in speaking and in writing. Candidates should be prepared to prove their English language skills.

Full-time employment as a PhD-candidate for a period of 4 years;

Annually 8% holiday allowance and 8.3% end of year allowance;

Support with your personal development and career planning including courses, summer schools, conference visits etc.;

a broad package of fringe benefits (including an excellent technical infrastructure, child care, moving expenses, savings schemes, coverage of costs of publishing the dissertation and excellent sports facilities)