PhD in Pipelined Analog-to-Digital Converter design

PhD in Pipelined Analog-to-Digital Converter design

Published Deadline Location
9 Aug 5 Nov Eindhoven

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Job description

In the last 40 years, the systematic downscaling of CMOS Integrated Circuit (IC) technologies has enabled unprecedented improvements in the transistor density, frequency of operation, energy efficiency and reliability. Most recent CMOS technologies allow the integration of several billions of transistors in a digital microprocessor chip the size of a fingernail. While technology downscaling has been extremely beneficial for digital circuits, the design of analog frontend electronics and Analog-to-Digital Converters (ADCs) in deep sub-micron CMOS technologies is becoming increasingly challenging due to the systematic power supply reduction, the intrinsically larger device parameter variability, and the higher low-frequency noise level of these transistors. Thus to counteract these effects and design high performance ADCs operating with a high level of reliability, complex and accurate calibration circuits need to be added. However, the design of these calibration circuits is challenging, and their effectiveness is typically limited to specific operating conditions.   

This project is done in cooperation with NXP semiconductors, Eindhoven.

Your duties

As a PhD researcher from the Integrated Circuits group, you will investigate novel methodologies to design and implement calibration circuits for pipelined Analog-to-Digital Converters even exploiting  Machine Learning (ML) techniques. During your PhD you will first identify the root causes which limit ADC performance. Next you will implement in hardware suitable algorithms to correct these errors, calibrate the ADC behavior and improve its performance. Finally, you will design a novel ADC with embedded ML calibration circuits, achieving beyond state-of-the-art performance.

In summary your main tasks will be:
  • Analyze and identify the major root causes which limit the performance of specific state-of-the-art ADCs.
  • Explore new design methodologies to post-correct errors in ADCs and enable smart calibrations.
  • Demonstrate the potential and effectiveness of the proposed approach by designing, implementing and characterizing Analog-to-Digital Converters achieving a performance beyond current state-of-the-art.
  • Dissemination of the results of your research in international and peer-reviewed journals and conferences.
  • Get involved in educational tasks such as the supervision of Master/Bachelor students and internships.
  • Writing a dissertation based on the research outcomes and successfully defending it. 


Eindhoven University of Technology (TU/e)


We are looking for a candidate who meets the following requirements:
  • You have a strong background in mixed-signal Integrated Circuit (IC) design.
  • You have a solid understanding of Analog-to-Digital Converters.
  • You hold an MSc degree in Electrical Engineering.
  • You are a talented and enthusiastic young researcher.
  • Prior knowledge of machine learning algorithms, neural and/or Bayesian networks is a plus.
  • You have good programming skills (preferably Python or MATLAB).
  • You have good communication and presentation skills and can work in a multidisciplinary team.
  • You will need to have a good proficiency in spoken and written English; knowledge of Dutch is not required

Conditions of employment

A meaningful job in a dynamic and ambitious university, in an interdisciplinary setting and within an international network. You will work on a beautiful, green campus within walking distance of the central train station. In addition, we offer you:
  • Full-time employment for four years, with an intermediate evaluation (go/no-go) after nine months. You will spend 10% of your employment on teaching tasks.
  • Salary and benefits (such as a pension scheme, paid pregnancy and maternity leave, partially paid parental leave) in accordance with the Collective Labour Agreement for Dutch Universities, scale P (min. €2,770 max. €3,539).
  • A year-end bonus of 8.3% and annual vacation pay of 8%.
  • High-quality training programs and other support to grow into a self-aware, autonomous scientific researcher. At TU/e we challenge you to take charge of your own learning process.
  • An excellent technical infrastructure, on-campus children's day care and sports facilities.
  • An allowance for commuting, working from home and internet costs.
  • A Staff Immigration Team and a tax compensation scheme (the 30% facility) for international candidates.


  • PhD
  • Engineering
  • max. 38 hours per week
  • University graduate
  • V36.6830


Eindhoven University of Technology (TU/e)

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De Rondom 70, 5612 AP, Eindhoven

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