EngD on the Design and Demonstration of Free-Space Optical Communication Systems

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EngD on the Design and Demonstration of Free-Space Optical Communication Systems

Deadline Published Vacancy ID 2025/471

Research fields

Engineering; Computer science

Job types

Research, development, innovation

Education level

University graduate

Weekly hours

38 hours per week

Salary indication

max. €3029 per month

Location

De Zaale, 5612AZ, Eindhoven

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Job description

Are you fascinated by the idea of high-speed space Internet, envisioned to be powered by more than 50000 low Earth orbit (LEO) satellites expected to be launched within 10 years? Join us on this research project in collaboration with multiple tech companies to develop and demonstrate the next generation of free-space optical (FSO) communication systems for satellite communications.

Satellite-based links are of key importance to provide ever-increasing data rates. Free-space optics is a technology that can help satisfy this demand thanks to the vast amounts of bandwidth available in the THz regime. The Eindhoven University of Technology recognizes a crucial paradigm shift, from intensitymodulated to coherent transmission, necessary in next generation FSO communication systems to provide high throughputs. To address this challenge, we are excited to announce an EngD position in the field of experimental FSO communications.
These two positions are part of a collaborative research project between leading technology companies and two research groups at TU/e: the Signal Processing Systems (SPS) and the Electronic Systems (ES) group. The research in this EngD project will be performed in close collaboration with Cubiq Technologies and the two research groups. You will be a part of a team that consists of 1 EngD, and 2 PhDs. Successful candidate will work on a field demonstration of DSP algorithms for FSO communications.

Requirements

  • A Master's degree in Electrical Engineering, Computer Science, or a related field.
  • Strong background in digital signal processing.
  • Background on error correcting codes is also highly desirable
  • Proficiency in programming languages such as MATLAB, Python, or C/C++.
  • Experience in RTL design and FPGA prototyping using VHDL/Verilog and/or HLS tools is highly desirable
  • A research-oriented attitude along with a result-focused mindset.
  • Ability to work in a collaborative interdisciplinary team and interested in collaborating with industry.
  • Fluent in spoken and written English (C1 level).

Conditions of employment

Fixed-term contract: 2 years.

A meaningful job in a dynamic and ambitious university, in an international setting with a close relationship to industry. You will work on a beautiful, green campus within walking distance of the central train station. In addition, we offer you:
  • Full-time employment for two years.
  • Salary and benefits (such as a pension scheme, paid pregnancy and maternity leave, partially paid parental leave) in accordance with the Collective Labour Agreement for Dutch Universities, scale TOIO (€ 3,029).
  • A year-end bonus of 8.3% and annual vacation pay of 8%.
  • To support you during your EngD and to prepare you for the rest of your career, you will have free access to a personal development program for EngD trainees.
  • An excellent technical infrastructure, on-campus children's day care and sports facilities.
  • An allowance for commuting, working from home and internet costs.
  • A Staff Immigration Team and a tax compensation scheme (the 30% facility) for international candidates.

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