PDENG on high-speed error correcting codes and signal shaping

PDENG on high-speed error correcting codes and signal shaping

Published Deadline Location
21 Sep 1 Nov Eindhoven

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Job description

Fibre optics are critical infrastructure for society because they carry nearly all the global Internet traffic. Over the last years, we have seen an explosive increase of data rates in fibre optics. For instance, in the short-haul domain, the traffic between data centers experienced a 400% growth from 2016 to 2021. This growth is a challenge not only to the technology demands but also to energy consumption. A single state-of-the-art optical transponder can reach a total power consumption of 700W. Applying Soft-Decision Forward Error Correction (SD-FEC) decoders would be superior in such multi-gigabit per second systems, but their power consumption is up to two orders of magnitude higher than Hard-Decision Forward Error Correction (HD-FEC) decoders. However, choosing the technology with better energy efficiency comes with a cost: HD-FEC decoders entail a significant performance loss, which will prevent the use of HD-FEC decoders in ultra-high-throughput fiber optics. More broadly, such drawbacks will also make HD-FEC decoders impractical for beyond 5G mobile communications and future wireless local area network (WiFi-like) standards. In order not to increase power consumption of future high-throughput communication systems further, the error correction algorithms need to be replaced with completely new approaches.

Recently proposed hybrid FEC (HY-FEC) systems, e.g., SABM, iBDD-SR, SABM-SR, iBDD-CR, etc., tackle the challenge above by combining flavors from high-performance SD-FEC and from low-power HD-FEC [1-4]. At an algorithm level, HY-FEC is able to close the performance gap between SD-FEC and HD-FEC, but with at least one order of magnitude lower energy consumption than that of SD-FEC. Furthermore, next-generation communication systems use high-order constellations. Approximately-realized constellation shaping (SH) techniques, applied to high-order constellations, have been shown to provide higher data rates than uniform signaling approaches, with low-complexity (LC) [5-7]. Investigating the performance of LC-SH / HY-FEC combinations is the core of this project, and a corresponding FPGA implementation is the key objective of this position.

[1] Y. Lei, B. Chen, G. Liga, X. Deng, Z. Cao, J. Li, K. Xu and A. Alvarado, ``Improved Decoding of Staircase Codes:  The Soft-Aided Bit-Marking (SABM) Algorithm,'' in IEEE Trans.  on Commun., vol.  67, no.  12, pp.  8220-8232, Dec.  2019. 
[2] G. Liga, A. Sheikh and A. Alvarado, ``A novel soft-aided bit-marking decoder for product codes,'' in Proc.  Eur.  Conf.  Opt.  Commun., Dublin, Ireland, 2019. 
[3] A. Sheikh, A. Graell i Amat, G. Liva and A. Alvarado, ``Refined Reliability Combining for Binary Message Passing Decoding of Product Codes,'' May 2020. 
[4] A. Sheikh, A. Graell i Amat and A. Alvarado, ``Novel High-Throughput Decoding Algorithms for Product and Staircase Codes based onError-and-Erasure Decoding,'' Aug.  2020.
[5] Y. C. Gültekin, F. M. J. Willems, W. J. van Houtum, and S. Şerbetli, ``Approximate enumerative sphere shaping,'' in Proc. IEEE Int. Symp. Inf. Theory, Vail, CO, USA, Jun. 2018, pp. 676-680.
[6] Y. C. Gültekin, W. J. van Houtum, A. Koppelaar, and F. M. J. Willems, ``Partial enumerative sphere shaping,'' in Proc. IEEE Veh. Technol. Conf. (Fall), Honolulu, HI, USA, Sep. 2019.
[7] Y. C. Gültekin, W. J. van Houtum, A. G. C. Koppelaar, and F. M. J. Willems, ``Low-complexity enumerative coding techniques with applications to amplitude shaping,'' IEEE Commun. Lett., Sep. 2020.

Academic and Research Environment

Eindhoven University of Technology (TU/e) is one of Europe's top technological universities, situated in the heart of one of Europe's largest high-tech innovation ecosystems. Research at TU/e is characterized by a combination of academic excellence and a strong real-world impact. This impact is often obtained via close collaboration with high-tech industries. 

This exciting research will be carried out at the signal processing systems (SPS) group, in particular, in the Information and Communication Theory Lab (ICT Lab), which is a world-leading group on the topic of information and communication theory. Our research in the topic of fiber optics is also carried out in close collaboration with the electro-optical communications (ECO) group, as well as with industrial partners both groups collaborate with.

For more details see:
http://www.tue.nl/en/research/research-groups/information-and-communication-theory-lab/
http://www.research.tue.nl/en/organisations/information-and-communication-theory-lab/
http://www.tue.nl/en/research/research-groups/electro-optical-communication/
http://www.sps.tue.nl/ictlab

Specifications

Eindhoven University of Technology (TU/e)

Requirements

We are hiring 1 post-master PDEng researcher for up to 2 years.
  • For the PDEng position, you must have a MSc degree in electrical engineering or any other relevant program.
  • A strong background on FPGA programming is highly desirable.
  • Theoretical and applied knowledge of signal processing algorithms and hardware/software design is beneficial.

You will be given the opportunity to gather specialized knowledge for the project in the first year of the study and will be required to follow related courses. You will also be coached by experienced TU/e staff with relevant experience.

You should be able bridge the distance between communication-theoretic concepts and hardware implementation. You should be able to think out of the box, provide structure to your work, have excellent multidisciplinary team working and communication skills, and be fluent in English.

Conditions of employment

  • A meaningful job in a dynamic and ambitious university with a close relationship to industry.
  • A full-time employment for two years.
  • To support you during your PDEng and to prepare you for the rest of your career, you will have free access to a personal development program for PDEng trainees.
  • A gross monthly salary of € 1.970 (on a fulltime basis), depending on experience and knowledge.
  • Additionally, an annual holiday allowance of 8% of the yearly salary, plus a year-end allowance of 8.3% of the annual salary.
  • A broad package of fringe benefits, including an excellent technical infrastructure, moving expenses, and savings schemes.
  • Family-friendly initiatives are in place, such as an international spouse program, and excellent on-campus children day care and sports facilities.

Specifications

  • Research, development, innovation
  • max. 38 hours per week
  • V36.4632

Employer

Eindhoven University of Technology (TU/e)

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Location

De Rondom 70, 5612 AP, Eindhoven

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